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Clock Generator

The CDCE949 and CDCEL949 are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. They generate up to 9 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to four independent configurable PLLs.

具有 2.5V 或 3.3V LVCMOS 输出的可编程 3-PLL VCXO 时钟合成器

The CDCE937 and CDCEL937 devices are modular PLL-based low cost, high-performance, programmable clock synthesizers, multipliers and dividers. They generate up to 7 output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to three independent configurable PLLs.

具有 2.5V 或 3.3V LVCMOS 输出的可编程 2-PLL VCXO 时钟合成器

The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.

具有 2.5V 或 3.3V LVCMOS 输出的可编程 1-PLL VCXO 时钟合成器

The CDCE913 and CDCEL913 devices are modular PLL-based, low-cost, high-performance, programmable clock synthesizers. They generate up to three output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using the integrated configurable PLL.

具有集成双路 VCO 的 4 路输出时钟发生器/抖动消除器

The CDCE62002 device is a high-performance clock generator featuring low output jitter, a high degree of configurability through a SPI interface, and programmable start-up modes determined by on-chip EEPROM. Specifically tailored for clocking data converters and high-speed digital signals, the CDCE62002 achieves jitter performance under 0.5 ps RMS(1).

2:8 超低功耗、低抖动时钟发生器

CDCM6208 是一款多用途、低抖动低功率频率合成器,此合成器可从两个输入中的一个生成 8 个低抖动时钟输出,这 8 个输出可在 与 LVPECL 相似的高摆幅 CML、正常摆幅 CML、与 LVDS 相似的低功耗 CML、HCSL、或者 LVCMOS 中进行选择,而两个输入针对多种无线基础设施基带、无线数据通信、计算、低功耗医疗成像和便携式测试和测量应用特有一个低频晶振或者 CML,LVPECL,LVDS,或者 LVCMOS 信号。 CDCM6208 还特有一个小数分频器架构,此架构使得其输出的四个能够生成频率精度好于 1ppm 的任一频率。 通过 I2C 或者串行外设接口 (SPI) 编程接口,可很简便地对 CDCM6208 进行配置,使用所提供的引脚模式中的控制引脚将器件设置成 32 个不同的预编程配置中的一个。

具有 14 输出的超低抖动时钟发生器

The LMK03806 device is a high-performance, ultra low-jitter, multi-rate clock generator capable of synthesizing 8 different frequencies on 14 outputs at frequencies of up to 2.6 GHz. Each output clock is programmable in LVDS, LVPECL or LVCMOS format. The LMK03806 integrates a high-performance integer-N PLL, low-noise VCO, and programmable output dividers to generate multiple reference clocks for SONET, Ethernet, Fiber Channel, XAUI, Backplane, PCIe, SATA, and Network Processors from a low-cost c

具有两个独立 PLL 的超低抖动时钟发生器系列

LMK03328 是一款超低噪声时钟发生器,包含两个集成有压控振荡器 (VCO) 的分数 N 频率合成器、灵活的时钟分配/扇出、以及可通过引脚选择的配置状态(存储在片上 EEPROM 中)。该器件可为各种千兆位级串行接口和数字器件提供多个时钟,并通过替代多个振荡器和时钟分配器件来降低物料清单 (BOM) 成本、减小电路板面积、以及提高可靠性。超低抖动可降低高速串行链路中的比特误码率 (BER)。

超低抖动时钟发生器系列

LMK03318 是一款超低噪声 PLLatinumTM 时钟发生器,包含一个集成压控振荡器 (VCO) 的分数 N 频率合成器、灵活的时钟分配/扇出以及可通过引脚选择的配置状态(存储在片上 EEPROM 中)。该器件可为各种千兆位级串行接口和数字器件提供多个时钟,从而通过替代多个振荡器和时钟分配器件来降低物料清单 (BOM) 成本、减小电路板面积、以及提高可靠性。超低抖动可降低高速串行链路中的比特误码率 (BER)。

具有集成 VCO 的精密 0 延迟时钟调节器

The LMK03200 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and 0-delay distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high performance Integer-N Phase Locked Loop (PLL), a partially integrated loop filter, and up to eight outputs in various LVDS and LVPECL combinations.

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